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? semiconductor components industries, llc, 2002 july, 2002 rev. 6 1 publication order number: mc74ac257/d mc74ac257, mc74act257 quad 2-input multiplexer with 3-state outputs the mc74ac257/74act257 is a quad 2input multiplexer with 3state outputs. four bits of data from two sources can be selected using a common data select input. the four outputs present the selected data in true (noninverted) form. the outputs may be switched to a high impedance state by placing a logic high on the common output enable (oe ) input, allowing the outputs to interface directly with busoriented systems. ? multiplexer expansion by tying outputs together ? noninverting 3state outputs ? outputs source/sink 24 ma ? act257 has ttl compatible inputs 15 16 14 13 12 11 10 2 1 34567 v cc 9 8 oe i 0c i 1c z c i 0d i 1d z d si 0a i 1a z a i 0b i 1b z b gnd figure 1. pinout: 16lead packages conductors (top view) pin name pin function s common data select input oe 3state output enable input i 0a i 0d data inputs from source 0 i 1a i 1d data inputs from source 1 z a z d 3state multiplexer outputs truth table output enable select input data inputs outputs oe s i 0 i 1 z h x x x z l h x ll l h x hh l l l xl l l h x h h = high voltage level l = low voltage level x = immaterial z = high impedance http://onsemi.com dip16 n suffix case 648 1 16 so16 d suffix case 751b 1 16 device package shipping ordering information mc74ac257n pdip16 25 units/rail mc74ac257d soic16 48 units/rail mc74ac257dr2 2500 tape & reel tssop16 dt suffix case 948f mc74ac257dt tssop16 96 units/rail mc74ac257dtr2 tssop16 soic16 2500 tape & reel mc74act257n pdip16 25 units/rail mc74act257d soic16 48 units/rail mc74act257dr2 2500 tape & reel mc74act257dt tssop16 96 units/rail mc74act257dtr2 tssop16 soic16 2500 tape & reel 1 16 see general marking information in the device marking section on page 7 of this data sheet. device marking information 1 16 eiaj16 m suffix case 966 mc74ac257mel eiaj16 2000 tape & reel mc74act257m eiaj16 mc74act257mel eiaj16 2000 tape & reel 50 units/rail
mc74ac257, mc74act257 http://onsemi.com 2 figure 2. logic symbol s oe i 0a i 1a i 0b i 1b z b i 0c i 1c i 0d i 1d z a z c z d functional description the mc74ac257/74act257 is a quad 2input multiplexer with 3state outputs. it selects four bits of data from two sources under control of a common data select input. when the select input is low, the i 0x inputs are selected and when select is high, the i 1x inputs are selected. the data on the selected inputs appears at the outputs in true (noninverted) form. the device is the logic implementation of a 4pole, 2position switch where the position of the switch is determined by the logic levels supplied to the select input. the logic equations for the outputs are shown below: z a = oe ? (i 1a ? s+i 0a ? s ) z b = oe ? (i 1b ? s+i 0b ? s ) z c = oe ? (i 1c ? s+i 0c ? s ) z d = oe ? (i 1d ? s+i 0d ? s ) when the output enable input (oe ) is high, the outputs are forced to a high impedance state. if the outputs are tied together, all but one device must be in the high impedance state to avoid high currents that would exceed the maximum ratings. designers should ensure the output enable signals to 3state devices whose outputs are tied together are designed so there is no overlap. note: this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. oe i 0a i 1a i 0b i 1b i 0c i 1c i 0d i 1d s z a z b z c z d figure 3. logic diagram
mc74ac257, mc74act257 http://onsemi.com 3 maximum ratings* symbol parameter value unit v cc dc supply voltage (referenced to gnd) 0.5 to +7.0 v v in dc input voltage (referenced to gnd) 0.5 to v cc +0.5 v v out dc output voltage (referenced to gnd) 0.5 to v cc +0.5 v i in dc input current, per pin 20 ma i out dc output sink/source current, per pin 50 ma i cc dc v cc or gnd current per output pin 50 ma t stg storage temperature 65 to +150 c *maximum ratings are those values beyond which damage to the device may occur. functional operation should be restricted to the recom- mended operating conditions. recommended operating conditions symbol parameter min typ max unit v supply voltage ac 2.0 5.0 6.0 v v cc supply voltage act 4.5 5.0 5.5 v v in , v out dc input voltage, output voltage (ref. to gnd) 0 v cc v v cc @ 3.0 v 150 t r , t f input rise and fall time (note 1) ac devices exce p t schmitt in p uts v cc @ 4.5 v 40 ns/v r , f ac devices except schmitt inputs v cc @ 5.5 v 25 t t input rise and fall time ( note 2 ) v cc @ 4.5 v 10 ns/v t r , t f in ut rise and fall time (note 2) act devices except schmitt inputs v cc @ 5.5 v 8.0 ns/v t j junction temperature (pdip) 140 c t a operating ambient temperature range 40 25 85 c i oh output current high 24 ma i ol output current low 24 ma 1. 1. v in from 30% to 70% v cc ; see individual data sheets for devices that differ from the typical input rise and fall times. 2. 2. v in from 0.8 v to 2.0 v; see individual data sheets for devices that differ from the typical input rise and fall times.
mc74ac257, mc74act257 http://onsemi.com 4 dc characteristics 74ac 74ac symbol parameter v cc (v) t a = +25 c t a = 40 c to +85 c unit conditions typ guaranteed limits v ih minimum high level 3.0 1.5 2.1 2.1 v out = 0.1 v ugee input voltage 4.5 2.25 3.15 3.15 v or v cc 0.1 v 5.5 2.75 3.85 3.85 v il maximum low level 3.0 1.5 0.9 0.9 v out = 0.1 v au oee input voltage 4.5 2.25 1.35 1.35 v or v cc 0.1 v 5.5 2.75 1.65 1.65 v oh minimum high level 3.0 2.99 2.9 2.9 i out = 50 a ugee output voltage 4.5 4.49 4.4 4.4 v 5.5 5.49 5.4 5.4 *v in = v il or v ih 3.0 2.56 2.46 v 12 ma 4.5 3.86 3.76 v i oh 24 ma 5.5 4.86 4.76 24 ma v ol maximum low level 3.0 0.002 0.1 0.1 i out = 50 a au oee output voltage 4.5 0.001 0.1 0.1 v 5.5 0.001 0.1 0.1 *v in = v il or v ih 3.0 0.36 0.44 v 12 ma 4.5 0.36 0.44 v i ol 24 ma 5.5 0.36 0.44 24 ma i in maximum input 55 01 10 a v i =v cc gnd au u leakage current 5.5 0.1 1.0 a v i = v cc , gnd i oz maximum v i (oe) = v il , v ih au 3state c 5.5 0.5 5.0 a v i = v cc , gnd current v o = v cc , gnd i old 2minimum dynamic ot tc t 5.5 75 ma v old = 1.65 v max i ohd output current 5.5 75 ma v ohd = 3.85 v min i cc maximum quiescent 55 80 80 a v in =v cc or gnd a u qu esce supply current 5.5 8.0 80 a v in = v cc or gnd *all outputs loaded; thresholds on input associated with output under test. 2maximum test duration 2.0 ms, one output loaded at a time. note: i in and i cc @ 3.0 v are guaranteed to be less than or equal to the respective limit @ 5.5 v v cc .
mc74ac257, mc74act257 http://onsemi.com 5 ac characteristics (for figures and waveforms see section 3 of the on semiconductor fact data book, dl138/d) 74ac 74ac symbol parameter v cc * (v) t a = +25 c c l = 50 pf t a = 40 c to +85 c c l = 50 pf unit fig. no. min typ max min max t plh propagation delay 3.3 1.5 5.0 8.5 1.0 9.0 ns 35 t plh i n to z n 5.0 1.5 4.0 6.0 1.0 7.0 ns 35 t phl propagation delay 3.3 1.5 6.0 8.5 1.0 9.0 ns 35 t phl i n to z n 5.0 1.5 4.5 6.0 1.0 7.0 ns 35 t plh propagation delay 3.3 1.5 7.0 10.5 1.5 11.5 ns 36 t plh s to z n 5.0 1.5 5.0 7.5 1.0 8.5 ns 36 t phl propagation delay 3.3 1.5 7.5 10.5 1.5 11.5 ns 36 t phl s to z n 5.0 1.5 5.5 7.5 1.0 8.5 ns 36 t pzh out p ut enable time 3.3 1.5 6.5 9.5 1.0 10.5 ns 37 t pzh o utput e na bl e ti me 5.0 1.5 5.0 7.5 1.0 8.5 ns 37 t pzl out p ut enable time 3.3 1.5 5.5 9.0 1.0 10.0 ns 38 t pzl o utput e na bl e ti me 5.0 1.5 5.0 8.5 1.0 9.5 ns 38 t phz out p ut disable time 3.3 1.5 5.5 10.0 1.0 11.0 ns 37 t phz o utput di sa bl e ti me 5.0 1.5 5.0 9.0 1.0 10.0 ns 37 t plz out p ut disable time 3.3 1.5 5.5 9.0 1.0 10.0 ns 38 t plz o utput di sa bl e ti me 5.0 1.5 5.0 8.0 1.0 9.0 ns 38 *voltage range 3.3 v is 3.3 v 0.3 v. *voltage range 5.0 v is 5.0 v 0.5 v.
mc74ac257, mc74act257 http://onsemi.com 6 dc characteristics 74act 74act symbol parameter v cc (v) t a = +25 c t a = 40 c to +85 c unit conditions typ guaranteed limits v ih minimum high level 4.5 1.5 2.0 2.0 v v out = 0.1 v ugee input voltage 5.5 1.5 2.0 2.0 v or v cc 0.1 v v il maximum low level 4.5 1.5 0.8 0.8 v v out = 0.1 v au oee input voltage 5.5 1.5 0.8 0.8 v or v cc 0.1 v v oh minimum high level 4.5 4.49 4.4 4.4 v i out = 50 a ugee output voltage 5.5 5.49 5.4 5.4 v *v in = v il or v ih 4.5 3.86 3.76 v i oh 24 ma 5.5 4.86 4.76 i oh 24 ma v ol maximum low level 4.5 0.001 0.1 0.1 v i out = 50 a au oee output voltage 5.5 0.001 0.1 0.1 v *v in = v il or v ih 4.5 0.36 0.44 v i ol 24 ma 5.5 0.36 0.44 i ol 24 ma i in maximum input 55 01 10 a v i =v cc gnd au u leakage current 5.5 0.1 1.0 a v i = v cc , gnd i cct additional max. i cc /input 5.5 0.6 1.5 ma v i = v cc 2.1 v i oz maximum v i (oe) = v il , v ih au 3state c 5.5 0.5 5.0 a v i = v cc , gnd current v o = v cc , gnd i old 2minimum dynamic ot tc t 5.5 75 ma v old = 1.65 v max i ohd output current 5.5 75 ma v ohd = 3.85 v min i cc maximum quiescent 55 80 80 a v in =v cc or gnd a u qu esce supply current 5.5 8.0 80 a v in = v cc or gnd *all outputs loaded; thresholds on input associated with output under test. 2maximum test duration 2.0 ms, one output loaded at a time.
mc74ac257, mc74act257 http://onsemi.com 7 ac characteristics (for figures and waveforms see section 3 of the on semiconductor fact data book, dl138/d) 74act 74act symbol parameter v cc * (v) t a = +25 c c l = 50 pf t a = 40 c to +85 c c l = 50 pf unit fig. no. min typ max min max t plh propagation delay 50 15 50 70 10 75 ns 36 t plh pro agation delay i n to z n 5.0 1.5 5.0 7.0 1.0 7.5 ns 36 t phl propagation delay 50 20 60 75 15 85 ns 36 t phl pro agation delay i n to z n 5.0 2.0 6.0 7.5 1.5 8.5 ns 36 t plh propagation delay 50 20 70 95 15 10 5 ns 36 t plh pro agation delay s to z n 5.0 2.0 7.0 9.5 1.5 10.5 ns 36 t phl propagation delay 50 25 70 10 5 20 11 5 ns 36 t phl pro agation delay s to z n 5.0 2.5 7.0 10.5 2.0 11.5 ns 36 t pzh output enable time 5.0 2.0 6.0 8.0 1.5 9.0 ns 37 t pzl output enable time 5.0 2.0 6.0 8.0 1.5 9.0 ns 38 t phz output disable time 5.0 2.5 6.5 9.0 1.5 10.0 ns 37 t plz output disable time 5.0 2.0 6.0 7.5 1.5 8.5 ns 38 *voltage range 5.0 v is 5.0 v 0.5 v. capacitance symbol parameter value typ unit test conditions c in input capacitance 4.5 pf v cc = 5.0 v c pd power dissipation capacitance 50 pf v cc = 5.0 v marking diagrams a = assembly location wl, l = wafer lot yy, y = year ww, w = work week ac257 awlyww mc74ac257n awlyyww ac 257 alyw act257 awlyww act 257 alyw mc74act257n awlyyww dip16 so16 tssop16 eiaj16 74ac257 alyw 74act257 alyw
mc74ac257, mc74act257 http://onsemi.com 8 package dimensions notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of leads when formed parallel. 4. dimension b does not include mold flash. 5. rounded corners optional. a b f c s h g d j l m 16 pl seating 18 9 16 k plane t m a m 0.25 (0.010) t dim min max min max millimeters inches a 0.740 0.770 18.80 19.55 b 0.250 0.270 6.35 6.85 c 0.145 0.175 3.69 4.44 d 0.015 0.021 0.39 0.53 f 0.040 0.70 1.02 1.77 g 0.100 bsc 2.54 bsc h 0.050 bsc 1.27 bsc j 0.008 0.015 0.21 0.38 k 0.110 0.130 2.80 3.30 l 0.295 0.305 7.50 7.74 m 0 10 0 10 s 0.020 0.040 0.51 1.01 pdip16 n suffix 16 pin plastic dip package case 64808 issue r notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 18 16 9 seating plane f j m r x 45 g 8 pl p b a m 0.25 (0.010) b s t d k c 16 pl s b m 0.25 (0.010) a s t dim min max min max inches millimeters a 9.80 10.00 0.386 0.393 b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.054 0.068 d 0.35 0.49 0.014 0.019 f 0.40 1.25 0.016 0.049 g 1.27 bsc 0.050 bsc j 0.19 0.25 0.008 0.009 k 0.10 0.25 0.004 0.009 m 0 7 0 7 p 5.80 6.20 0.229 0.244 r 0.25 0.50 0.010 0.019 so16 d suffix 16 pin plastic soic package case 751b05 issue j
mc74ac257, mc74act257 http://onsemi.com 9 package dimensions tssop16 dt suffix 16 pin plastic tssop package case948f01 issue o ??? ??? dim min max min max inches millimeters a 4.90 5.10 0.193 0.200 b 4.30 4.50 0.169 0.177 c --- 1.20 --- 0.047 d 0.05 0.15 0.002 0.006 f 0.50 0.75 0.020 0.030 g 0.65 bsc 0.026 bsc h 0.18 0.28 0.007 0.011 j 0.09 0.20 0.004 0.008 j1 0.09 0.16 0.004 0.006 k 0.19 0.30 0.007 0.012 k1 0.19 0.25 0.007 0.010 l 6.40 bsc 0.252 bsc m 0 8 0 8 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash. protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. dimension k does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the k dimension at maximum material condition. 6. terminal numbers are shown for reference only. 7. dimension a and b are to be determined at datum plane -w-. section nn seating plane ident. pin 1 1 8 16 9 detail e j j1 b c d a k k1 h g detail e f m l 2x l/2 u s u 0.15 (0.006) t s u 0.15 (0.006) t s u m 0.10 (0.004) v s t 0.10 (0.004) t v w 0.25 (0.010) 16x ref k n n eiaj16 m suffix 16 pin plastic eiaj package case96601 issue o h e a 1 dim min max min max inches --- 2.05 --- 0.081 millimeters 0.05 0.20 0.002 0.008 0.35 0.50 0.014 0.020 0.18 0.27 0.007 0.011 9.90 10.50 0.390 0.413 5.10 5.45 0.201 0.215 1.27 bsc 0.050 bsc 7.40 8.20 0.291 0.323 0.50 0.85 0.020 0.033 1.10 1.50 0.043 0.059 0 0.70 0.90 0.028 0.035 --- 0.78 --- 0.031 a 1 h e q 1 l e 10 0 10 l e q 1 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions d and e do not include mold flash or protrusions and are measured at the parting line. mold flash or protrusions shall not exceed 0.15 (0.006) per side. 4. terminal numbers are shown for reference only. 5. the lead width dimension (b) does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the lead width dimension at maximum material condition. dambar cannot be located on the lower radius or the foot. minimum space between protrusions and adjacent lead to be 0.46 ( 0.018). m l detail p view p c a b e m 0.13 (0.005) 0.10 (0.004) 1 16 9 8 d z e a b c d e e l m z
mc74ac257, mc74act257 http://onsemi.com 10 notes
mc74ac257, mc74act257 http://onsemi.com 11 notes
mc74ac257, mc74act257 http://onsemi.com 12 on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indem nify and hold scillc and its of ficers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and re asonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized u se, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employ er. publication ordering information japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. mc74ac257/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com n. american technical support : 8002829855 toll free usa/canada

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